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Espressif Systems /ESP32-P4 /ISP /CAM_CNTL

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Interpret as CAM_CNTL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CAM_EN)CAM_EN 0 (CAM_UPDATE)CAM_UPDATE 0 (CAM_RESET)CAM_RESET 0 (CAM_CLK_INV)CAM_CLK_INV

Description

isp cam source control register

Fields

CAM_EN

write 1 to start recive camera data, write 0 to disable
CAM_UPDATE

write 1 to update ISP_CAM_CONF
CAM_RESET

this bit configures cam clk domain reset, 1: reset cam input logic, 0: release reset
CAM_CLK_INV

this bit configures the invertion of cam clk from pad. 0: not invert cam clk, 1: invert cam clk

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data